1. Technical Field
This disclosure relates to memory systems, and more particularly to memory command scheduling on a memory interface.
2. Description of the Related Art
In many computer systems, a memory device may be read from and written to using a variety of conventional memory interfaces and protocols. For example, in some conventional protocols, separate channels may exist for transmitting a memory command, the address, and the associated write data. Bandwidth may be allocated to each of these channels based on the bandwidth need for the respective channel. This type of interface may have drawbacks. More particularly, bandwidth may be lost on some of the channels since some of the channels will not need nearly as much bandwidth as other channels. Some conventional memory protocols may have additional drawbacks. For example, the data for a write command may only be sent at a specific time relative to the write command. This type of command and data scheduling may also limit bandwidth, depending on when and how many read commands or other commands may be concurrently pending.